Group SD0703
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Contents |
Analog Time Division Multiplexer
Team Members:
Advisor:
Project Description
The goal of senior design group SD0703 is to design and implement an analog multi-channel acoustic transceiver. This transceiver will be capable of receiving 32 real low-level 20 KHz bandwidth audio signals and delivering a single composite broadband signal which contains all of the input channels as an analog time-division multiplexed signal. The transmit function of the transceiver is the reverse process: converting the single composite broadband signal to 32 real audio signals which are delivered to an array of loudspeakers.
Requirements Capture
Receive 32 real 20 kHz bandwidth audio signals
Organize input signals as an analog time-division multiplexed signal
Transmit and re-organize the single composite broadband signal to the original 32 audio signals
Composite signal should be accurate to the originals within a LSB of a 12 bit A/D converter
Sampling of all 32 channels must occur simultaneously
Block Diagram
The following picture is a descriptive diagram of the project.
Current State
At the close of ECE403 the group has completed their main objective for the semester. This objective was to implement a 4 channel multiplexer. The purpose of the 4 channel multiplexer is for test and optimization of the circuits before the project is increased to a 32 channel design.
Major Tasks Left to Complete
1. Low pass filter integration into the circuit (not necessary for testing at this time)
2. Multiplexer / De-multiplexer synchronization
3. De-multiplexer design
4. Signal integrity of the composite signal
Sweet Links!
Here is the link to our 403 final design presentation.
Here is the link to our Final Technical Document.
Here is the link to our Conceptual Design and Options Considered w/ Budget.
Begin SD0703 405
Tasks complete at the close of SD0703 405
1. Redesigned logic waveform generation circuity to accommodate higher clock frequencies used in 405 design.
2. Completed schematic capture and PCB layout for circuits designed in 403 (along with the changes mentioned in 1).
3. Designed demultiplexer digital and analog circuits.
4. Breadboarded, debugged, modified and evaluated entire system.
5. Completed schematic capture and PCB layout for circuits designed in 405.
6. Assembled, tested and documented fully the functional Analog Time-Division Multiplexer.
Future Work
The system as it is now is fully functional and meets all requirements. However, one added functionality that was not part of our requirements but the team hoped to complete is still unfinished. This involves placing on the composite signal a sinusoid filtered from the crystal oscillator. On the demultiplexer board this sinusoid would be filtered back off the composite signal and used to drive the demultiplexer circuit. Along with passive filter design, this project would involve designing some frame synchronization circuitry. Attempts were made at adding this circuitry but time ran out for SD0703.
A block diagram in the "Final Report" document more completely describes the idea. At the close of 405 new board revisions with other improvements are complete and waiting for Dr. Farden's scholar team to complete this task.
Documents and Presentations
Here is the link to our user's manual.
Here is the link to our final report.
